UMC design and implementation of new Calibre platform reliability verification, and interactive custom design validation

Mentor Graphics Corporation (Nasdaq: MENT) today announced, United Microelectronic Corporation (UMC) is for its customers to develop a new set of IC reference flow reliability. This new process is based on the Calibre® PERC ™ reliability verification platform developed that detects small design flaws, such as may be caused venue (in-field) fault electrostatic discharge (ESD) protection circuit is missing, to help customers improve Long-term reliability of its IC products. This solution includes the UMC and Mentor Graphics are jointly developing a pre-defined check, target customers using UMC 28 nm process all common clients. UMC is expected to debut at the end of this year to check its reliability.

In addition, UMC is also designed to achieve added Calibre RealTime platform solutions. UMC simulation results indicate that the use of Calibre RealTime in custom design to identify and solve physical verification problems can be more than double the productivity.

Calibre RealTime allows design engineers to layout editing software is often used when drawing the respective circuit layout in real time interactive viewing validation errors. Since this tool uses the standard signoff Calibre UMC design kit, UMC customers can also achieve the same efficiency UMC claimed improved.

Director of R & D-cum UMC silicon intellectual property design Support Linshi Qin said: "The circuit reliability checks need to have a special function tool automation system design engineers need to identify a specific circuit structures such as ESD protection circuit, and the internal voltage value can be calculated. to ensure that the circuit voltage of each node is maintained at the limits. At the same time, improve production efficiency is the direction of UMC UMC-house design team and the concerted efforts of customers. By adding design implementation platform Calibre® PERC ™ and Calibre RealTime tools , we can meet these requirements. "

Calibre® PERC ™ solution provides a unique feature that allows you to check the physical layout and schematic netlist information, which include the type and connection between the various components. This logic-driven layout (LDL) ensures that all design analysis capabilities, including UMC IP libraries and customer design meets UMC ESD and electrical overload (EOS) design rules. Important part of ESD / EOS protection techniques include:

• Verify whether the ESD protection circuit in all necessary positions
• Ensure that the IO Pad to power / ground Pad ESD path of least resistance interconnects, and can withstand greater Human Body Model (HBM) surge current
ESD protection diodes and resistors • Check the layout of the components of
• Check the ESD MOS / diode component is covered with the correct symbol layer
• ensuring the protection circuit assembly is properly connected to the power cord, and the voltage range is correct

Other products Calibre® PERC ™ products and co-operation of the Calibre platform, not only can detect violations of reliability design guidelines, but also provides global browsing environment on the circuit connectivity, topology, physical layout and design rules to help design Engineers debugging circuit reliability problems.

Mentor Graphics' Calibre Design Solutions Marketing Senior Director MichaelBuehler-Garcia expressed: "UMC and Mentor have collaborated to develop an automated solution leverages the solution, design engineers can more easily ensure first-class design reliability. while significantly enhance the design verification efficiency. With the automotive, medical and other markets on the reliability of electronic technology and design and development cycle of growing importance, the Calibre® PERC ™ and Calibre RealTime incorporated into your IC Design Toolbox will take you to a significant advantage. "

UMC plans to increase in the future each update release process more reliable inspection.